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| High-end recruitement |
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| Senior ASIC design engineer (2 openings) |
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| Location: |
Shenzhen, China; Shanghai, China; Beijing, China |
| Responsibilities: |
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| Perform module level micro-architecture specification, RTL design, implementation and verification of a high-speed data communication chipset. |
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| Qualifications: |
1. Bachelo's Degree or higher in Computer Science, Electrical Engineering, Telecommunications or equivalent, with 5+ years experience in ASIC logic design.
2. In-depth knowledge and experience with data communication chipset architecture, design, and implementation.
3. Ability to work in a team environment; be self motivated and inclined to take initiative; possess excellent communication skills. |
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| E-mail: wangsumei@huawei.com |
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| RFIC expert (2 openings) |
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| Location: |
Shanghai, China |
| Responsibilities: |
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Responsibilities：
1. Responsible for or involved in the RFIC architecture design, critical technical problem solutions and trade-off between building blocks to meet product requirements;
2. Advice/guide the circuits design of the key building blocks;
3. Advice/guide RF blocks integration and system level verification;
4. Advice/guide the RFIC chip layout floor plan and design;
5. Advice/guide the RFIC package, test, and yield proving.
6. Review and responsible for the qualified delivery of work in each phase to ensure the committed schedules. |
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| Qualifications: |
1. 5 plus years of proven project experience in RFIC design.
2. Hands-on experience and in-depth knowledge of CMOS RFIC design.
3. Good knowledge about the Cellular communication standards and the developing trends.
4. Good knowledge about the RFIC layout, EM theory and EDA tools to achieve optimized RF performance.
5. One of the following product experiences is a must.
A. WCDMA、CDMA、GSM/EDGE Cellular phone transceiver;
B. PLL/VCO for the Cellular telecommunication, GSM/EDGE related product is preferred;
C. Power Amplifier for the Cellular mobile terminal;
6.Team leader with successful experience of leading product team is strongly preferred. |
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| E-mail: wangsumei@huawei.com |
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| Senior Analog IC design engineer (3 openings) |
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| Location: |
Shenzhen, China; Santa Clara, CA |
| Responsibilities: |
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| Act as principal designer of chip, be responsible for major parts of the chip design and verification, provide guidance to junior engineers on the design/layout, perform review to improve quality of delivery, also be involved in debug and ramp to production of the chip. |
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| Qualifications: |
1. Bachelor's Degree or higher in Electrical Engineering or equivalent.
2. 4+ years experience on analog IC design with successful mixed-signal chip tapeout record.
3. In-depth knowledge and design experience on at least one of following areas include high speed, high precision ADC/DAC, power management, high speed SERDES/PHY, audio CODEC.
4. Ability to work in a team environment; be self motivated and inclined to take initiative; possess excellent communication skills. |
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| E-mail: wangsumei@huawei.com |
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| SOC Architecture Expert (2 openings) |
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| Location: |
Shenzhen, China; Beijing, China |
| Responsibilities: |
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| Be responsible for SOC (system on chip) architecture design, perform performance, bandwidth, cost and low power design to achieve competition capability. |
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| Qualifications: |
1. 5+ years of SoC design experience.
2. In depth knowledge of DSU/DSP design.
3. Great knowledge of SOC IC architecture design and optimization.
4. Knowledge of Video/Audio/Wireless arithmetic experience is highly desirable.
5. Strong documentation and communication skills. Excellence as a team player with proven collaboration skills with all stakeholders.
6. A Bachelor of Science degree in Computer Science, EE or Math is required. A Masters of Science degree in one of the aforementioned disciplines is highly desirable. |
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| E-mail: wangsumei@huawei.com |
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| Senior backend engineer (2 openings) |
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| Location: |
Shenzhen, China; Shanghai, China |
| Responsibilities: |
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| Responsible for physical architecture implementation of large, complex, high-performance CMOS chips, focus on physical design, partitioning, floorplanning, physical verification and reliability verification. |
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| Qualifications: |
1. Bachelor’s Degree or higher in Electrical Engineering or equivalent.
2. 3+ years experience on physical design and at least successfully tapeout one 90nm or 65nm chip.
3. Experienced in Place & Route timing closure, synthesis, Static Timing Analysis.
4. A solid understanding of synthesis with Synopsys Design Compiler, timing driven layout and post-layout timing analysis with PrimeTime of deep sub-micron designs is essential.
5. Ability to work in a team environment; be self motivated and inclined to take initiative; possess excellent communication skills.
6. Bi-lingual Mandarin is preferred. |
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| E-mail: wangsumei@huawei.com |
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| Video & Image Algorithm Expert (2 openings) |
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| Location: |
Shenzhen, China; Beijing, China |
| Responsibilities: |
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| Be responsible for algorithm design, algorithm analysis, algorithm modeling in video or image processing field, tradeoff among algorithm effort, algorithm complexity and cost to achieve competition capability. |
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| Qualifications: |
1. 6+ years experience on video or image processing algorithm design.
2. Successful experience on algorithm modeling or implement on a DSP processor in MPEG2/MPE4/H263/H264/VC1/Real video standard protocol.
3. Successful experience on algorithm modeling or implement on a DSP processor in graphics such as 2D/3D processing, image scalar, OSD, image de-noise, AWB(Auto White Balance), AE(Auto Expose), AF( Auto Focus), etc.
4. Knowledge of standard and experience on attendance standard organization meeting is a plus.
5. Must have excellent communication, documentation and organizational skills. Candidate must be an independent thinker with solid interpersonal and organizational skills.
6. A Bachelor of Science degree in Computer Science, EE or Math is required. A Masters of Science degree in one of the aforementioned disciplines is highly desirable. |
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| E-mail: wangsumei@huawei.com |
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| DSP Design Expert (2 openings) |
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| Location: |
Shenzhen, China; Beijing, China |
| Responsibilities: |
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| Be responsible for the design and implementation of high performance DSP for the advanced process of digital signals including video, audio and image to achieve the competitive advantage in both performance and cost. |
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| Qualifications: |
1. 6+ years experience on RISC or DSP architecture design and implementation.
2. Successful experience on RISC architecture, familiar with multi-core architecture.
3. Successful experience of customized processor design according to the algorithm.
4. Familiar with compiler, and successful experience of compiler implementation.
5. Familiar with video, audio or image process algorithm is preferred.
6. Strong communication capability and teamwork.
7. A Bachelor of Science degree in Computer Science, EE or Math is required. A Masters of Science degree in one of the aforementioned disciplines is highly desirable. |
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| E-mail: wangsumei@huawei.com |
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| Senior manager of business development (2 openings) |
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| Location: |
Shenzhen, China |
| Responsibilities: |
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1. Business development: search new business opportunity, analyze market environment, promote the decision and execution.
2. Strategic cooperation: construct cooperation with IC venders following HiSilicon's strategy.
3. Research on IC industry development trend and important competitors' strategic activities. |
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| Qualifications: |
1. More than 5 years' experiences on telecom or consumer IC industry, good and long-term relationship with customers.
2. Familiar with business development method and procedure, capability in E2E marketing and organization administration.
3. Acute marketing sense, team spirit and communication ability.
4. Fluent English speaker.
5. Working experiences in large IC vender ,knowledge of network technology , overseas background will be preferred.
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| E-mail: wangsumei@huawei.com |
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| Senior Mobile Phone Application design engineer (1 opening) |
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| Location: |
Shanghai, China |
| Responsibilities: |
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| Act as principal designer of mobile phone applications and application platform, be responsible for major parts of the application design, provide guidance and review to junior engineers on the application design. |
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| Qualifications: |
1. Bachelor's Degree or higher in software, computer science and technology, communication or equivalent.
2. 4+ years experience on mobile phone application design, and with successful R&D team management experience much better.
3. In-depth knowledge and design experience on at least one of following areas include application platform, media CODEC/application software, or other mobile phone application software.
4. In-depth knowledge and design experience on at least one of following areas include Windows Mobile, Windows CE, Linux or other portable mobile phone OS platforms.
5. Ability to work in a team environment; be self motivated and inclined to take initiative. |
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| E-mail: wangsumei@huawei.com |
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