Hi3559AV100

• Dual-core Arm Cortex-A73@1.6 GHz, 32 KB I-cache, 64 KB D-cache, 512 KB L2 cache
• Dual-core Arm Cortex-A53@1.2 GHz, 32 KB I-cache, 32 KB D-cache, 256 KB L2 cache
• Single-core Arm Cortex-A53@1 GHz, 32 KB I-cache, 32 KB D-cache, 128 KB L2 cache
• Neon acceleration, with an integrated FPU

• Dual-core Arm Mali G71@900 MHz, 256 KB cache
• OpenCL 1.1/1.2/2.0
• OpenGL ES 3.0/3.1/3.2

• Integrated Arm Cortex-M7@192 MHz
• Integrated PMC, which supports only external reset
• Internal POR
• General peripheral IPs (UART, SPI, I²C, PWM, GPIO, and LSADC)
• 2-channel LSADC, 7x UART interfaces, and 8x PWM interfaces

• H.264 BP/MP/HP
• H.265 Main Profile/Main 10 Profile
• I-/P-/B-frames supported for H.264/H.265 encoding
• MJPEG/JPEG Baseline
• A maximum of 8192 x 8640 resolution for H.264 encoding
• A maximum of 16384 x 8640 resolution for H.265 encoding
• Real-time multi-stream H.264/H.265 encoding capabilities:
− 7680 x 4320@30 fps+1080p@30 fps+7680 x 4320@2 fps snapshot
• JPEG snapshot performance up to 7680 x 4320@15 fps
• Five bit rate control modes (CBR, VBR, AVBR, FIXQP, and QPMAP)
• Up to 200 Mbit/s output bit rate
• Encoding of eight ROIs

• H.264 BP/MP/HP
• H.265 Main Profile/Main 10 Profile
• JPEG/MJPEG Baseline
• Video decoding performance up to H.264/H.265 7680 x 4320@30 fps or H.264/H.265 3840 x 2160@120 fps
• JPEG decoding up to 7680 x 4320@15 fps

• Visual computing processing capability
• Quad-core DSP@700 MHz, 32 KB I-cache, 32 KB IRAM, or 512 KB DRAM
• Dual-core NNIE@840 MHz neural network acceleration engine
• Built-in binocular depth detection unit

• Anti-flicker for output videos and graphics
• 1/15.5x to 16x video scaling
• 360° or 720° panoramic stitching of up to 6-channel videos
• 1/15.5x to 16x graphics scaling
• OSD overlaying of eight regions before encoding
• Video graphics overlaying of two layers (video layer and graphics layer)

• 2-channel independent ISP processing of video inputs from multiple sensors in TDM mode
• Adjustable 3A functions (AE, AWB, and AF)
• FPN removal
• Highlight suppression, backlight compensation, gamma correction, and color enhancement
• DPC, NR, and 6DoF DIS
• 3DNR, image enhancement, and DCI
• Dehaze
• LDC and fisheye correction
• Image rotation by 90° or 270°
• Image mirroring and flipping
• HDR10
• BT.2020 WCG
• Sensor built-in WDR, 4F/3F/2F frame-based/line-based WDR and local tone mapping
• ISP tuning tools on the PC

• Multi-protocol voice encoding and decoding implemented on software
• G.711, G.726, AAC, and other audio encoding formats
• Audio 3A functions (AEC, ANR, and ALC)

• AES, DES, and 3DES encryption and decryption algorithms implemented on hardware
• RSA1024/2048/3072/4096 signature verification algorithms implemented on hardware
• HASH_SHA1/224/256/384/512 and HMAC_SHA1/224/256/384/512 tamper proofing algorithms implemented on hardware
• Integrated 32-kbit OTP storage space and hardware random number generator

• VI
− 8x sensor inputs
− Up to 32-megapixel (7680 x 4320) or 36-megapixel (6000 x 6000) resolution
− 8-/10-/12-/14-bit RGB Bayer DC timing VI, up to 150 MHz clock frequency
− BT.601, BT.656, and BT.1120 VI interfaces
− Up to 16-lane MIPI/LVDS/sub-LVDS/HiSPI/SLVS-EC interfaces for serial sensor inputs
− Up to 8-channel serial video inputs, supporting various operating modes such as 1 x 16 lanes/2 x 8 lanes/4 x 4 lanes/2 x 4 lanes + 4 x 2 lanes/8 x 2 lanes
− Compatibility with the electrical specifications of parallel and differential interfaces of various sensors
− Programmable sensor clock output
• VO
− HDMI 2.0 display output
− Up to 8K (7680 x 4320)@30 fps HDMI resolution
− 6-/8-/16-/24-bit RGB digital LCD output, supporting up to 1920 x 1080@60 fps output
− 4-lane MIPI DSI output, supporting up to 2.5 Gbit/s/lane frequency

• Integrated audio codec, supporting 16-bit audio inputs and outputs
• I²S interface, connected to the external audio codec
• Dual-channel differential MIC inputs for reducing background noise

• POR
• External reset input
• Internal RTC
• Integrated 2-channel LSADC
• 5x UART interfaces
• IR, I²C, SSP master, and GPIO interfaces
• Integrated 2x GMACs, supporting RGMII/RMII
• 2x PWM interfaces
• 2x SD 3.0/SDIO 3.0 interfaces and 1x SD 2.0 interface
• 2x USB 3.0/USB 2.0 interfaces in host/device mode
• 2-lane PCIe 2.0 RC/EP mode

• DDR4/LPDDR4 interface
− 64-bit DDR4
− 2x 32-bit LPDDR4 SDRAMs
− Maximum capacity of 8 GB
• SPI NOR flash interface
− 1-/2-/4-wire mode
− 3-/4-byte address mode
− Maximum capacity of 64 MB
• SPI NAND flash interface
− Maximum capacity of 512 MB
• NAND flash interface
− 8-bit data width
− SLC or MLC
− 4-/8-/16-/24-/40-/64-bit ECC
• eMMC 5.1 interface
− Maximum capacity of 2 TB
• UFS 2.1 interface
− Maximum capacity of 512 GB
• Booting from the SPI NOR flash, SPI NAND flash, or NAND flash
• Booting from an eMMC or UFS

• Linux SMP
• Linux+HUAWEI LiteOS AMP
• High-performance H.265 decoding library

• Power consumption
− Typical power consumption of 3 W in the 4K120 scenario
− Multi-level power saving modes
• Operating voltages
− 0.8 V core voltage
− 1.8 V I/O voltage
− 1.2 V DDR4 SDRAM interface voltage
− 1.1 V LPDDR4 SDRAM interface voltage
• Package
− RoHS, FC-BGA
− Body size of 25 mm x 25 mm
− Ball pitch of 0.65 mm