This latest design powers multi-channel HD/UHD digital video recorders. With powerful processor and inference engine, multiple intelligent algorithm applications are now a reality. Integrated MIPI D-PHY inputs break through predecessor limits in video input performance and capability. Improving on the H.265 video codec engine and video image processing algorithm, this SoC provides analog HD DVR solutions for multiple peripheral devices and high-speed interfaces for wide adoption in analog HD surveillance markets.

Arm Cortex-A7 quad-core processor@900 MHz

4-channel 1080p15 H.265/H.264 encoding and four 1080p30 real-time video inputs

NNIE with 0.5 TOPS of computing power

Key Features

  • Processor Cores

    • Arm Cortex-A7 quad-core@900 MHz
    − 32 KB L1 I-cache and 32 KB L1 D-cache
    − 256 KB L2 cache
    − Neon and FPU
  • Multi-Protocol Video Codec

    • H.265 Main Profile, Level 4.1 encoding
    • H.265 Main Profile, Level 4.1 decoding
    • H.264 Baseline/Main/High Profile, Level 4.2 encoding
    • H.264 Baseline/Main/High Profile, Level 4.2 decoding
    • MJPEG/JPEG Baseline encoding and decoding
  • Video Codec

    • H.265/H.264/JPEG multi-stream encoding and decoding performance:
    − 4x 1080p@15 fps H.265/H.264 encoding+4x D1@30 fps H.265/H.264 encoding+4x 1080p@15 fps H.265/H.264 decoding+4x 1080p@2 fps JPEG encoding
    • Seven bit rate control modes (CBR, VBR, AVBR, CVBR, FIXQP, QPMAP, and QVBR)
    • Up to 20 Mbit/s output bit rate
    • ROI encoding
    • Color-to-grayscale encoding
  • SVP

    • NNIE
    − Multiple neural network options
    − 0.5 TOPS computing performance
    − Comprehensive APIs and toolchains
    − Diverse processing including
    − Diverse applications such as face detection, facial recognition, object detection, and object tracking
    • IVE
    − Object tracking
    • MAU
    − Single-precision or half-precision floats
    − Feature vector comparison
  • Video and Graphics Processing

    • Pre-processing and post-processing including deinterlacing, sharpening, 3DNR, DCI, and mosaic
    • Anti-flicker for video and graphic outputs
    • Video scaling (1/15x to 16x)
    • Graphics scaling (1/2x to 2x)
    • Up to four Cover regions
    • Up to 8-region OSD overlay
  • Video Interfaces

    • VI interfaces
    − Two MIPI D-PHY interfaces
    • Four lanes supported by MIPI0
    • Two lanes supported by MIPI1
    • Two operating modes: 1 x 4 lanes and 2 x 2 lanes
    • Up to 1.5 Gbit/s per lane
    • Single input, two multiplexed inputs, or four multiplexed inputs
    • Multiplexed as two 8-bit BT.656 interfaces
    − Two BT.656 interfaces can form one 16-bit BT.1120 interface.
    − Both BT.656 and BT.1120 interfaces support dual-edge sampling at 148.5 MHz.
    − Up to 8 VI channels (including one video cascade channel)
    − 4-channel online video scaling
    − The source image and the scaled image can be output at the same time.
    − Maximum input performance: 4-channel 1080p@30 fps (or 4M/5M/4K images with the same data volume)
    • VO interfaces
    − One HDMI 1.4b output interface with the maximum output of 3840 x 2160@30 fps
    − One VGA HD output interface at up to 1080p@60 fps
    − One BT.1120/BT.656 digital output interface, with the respective maximum output of 1080p@60 fps/1080p@30 fps
    − 24-bit digital LCD (digital RGB) interface, with the maximum output of 720p@60 fps
    − One CVBS SD output interface, supporting the PAL/NTSC standard output
    − One HD VO channel (DHD 0)
    • Two HD interfaces with display from the same source
    • DHD 0 supports 16-picture display.
    − One independent SD output channel (DSD 0)
    − One PiP layer
    − One GUI graphics layer in ARGB1555, ARGB4444, or ARGB8888 format
    − One special graphics layer, which supports CLUT 2/CLUT 4 and can be bound to DHD 0 or DSD 0
    − One hardware cursor layer in ARGB1555, ARGB4444, or ARGB8888 format (configurable) with a maximum resolution of 256 x 256
  • Audio Interfaces

    • Three unidirectional I2S/PCM interfaces
    − Two inputs, 20-channel multiplexed
    − One dual-channel output
  • ETH Interfaces

    • One FE interface
    − Integrated FE PHY
    − 10/100 Mbit/s half-duplex or full-duplex
    − TSO for reducing the CPU overhead
  • Security Engine

    • AES 128/192/256-bit encryption and decryption algorithms
    • RSA 2048/4096-bit encryption and decryption algorithms
    • OTP, providing 28-kbit user space to burn images
    • Hardware-based true random number generator
    • Secure boot
    • Secure memory isolation
  • Peripheral Interfaces

    • 2x SATA 3.0 interfaces
    • 3x USB 2.0 host interfaces
    • 5x UART interfaces, one of which supports the 4-wire mode
    • 2x SPI interfaces
    • 1x IR interface
    • 2x I2C interfaces
    • Multiple GPIO interfaces
  • Memory Interfaces

    • One 16-bit DDR4/DDR3 interfaces
    − Maximum DDR4 clock frequency: 1333 MHz
    − Maximum DDR3 clock frequency: 1066 MHz
    − Maximum capacity: 2 GB
    • One SD/MMC interface
    − eMMC 5.0
    − HS400 (150 MHz dual-edge)
    − SDIO 2.0 and SDIO 3.0
    − SD 2.0 card
    • SPI NOR flash and SPI NAND flash interfaces
    − Two CSs, which can be connected to different types of flash memories
    − For the SPI NOR flash:
    • 1-/2-/4-wire mode
    • 3-/4-byte address mode
    • Maximum capacity: 256 MB
    − For the SPI NAND flash:
    • SLC flash
    • 2 KB or 4 KB page size
    • 8- or 24-bit ECC (unit: KB)
    • Maximum capacity: 2 GB
  • RTC with Independent Power Supply

    Independent battery for supplying power to the RTC
  • Multiple Boot Modes

    • Booting from the BootROM
    • Booting from the SPI NOR flash
    • Booting from the SPI NAND flash
    • Booting from the eMMC
  • SDK

    • Linux SMP (32-bit)
    • Audio codec libraries that support multiple protocols
    • High-performance PC decoding library based on H.265/H.264
  • Chip Physical Specifications

    • Power consumption
    − Power consumption in typical scenarios (4-channel 1080p@15 fps encoding + 4-channel 1080p@30 fps decoding + deep learning intelligent algorithm): 2.2 W
    − Multi-level power consumption control
    • Operating voltages
    − Core voltage: 0.9 V
    − CPU voltage: 1.0 V
    − I/O voltage: 1.8 V/3.3 V
    − Voltage of the DDR4 interface: 1.2 V
    − Voltage of the DDR3 interface: 1.5 V
    • Package
    − RoHS, TFBGA
    − Ball pitch: 0.65 mm
    − Dimensions: 15 mm x 15 mm
    − Operating temperature: 0°C–70°C

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