Chipsets

Hi3531DV200

This latest design powers multi-channel HD/UHD digital video recorders. With powerful processor and inference engine, multiple intelligent algorithm applications are now a reality. Integrated MIPI D-PHY inputs break through predecessor limits in video input performance and capability. Improving on the H.265 video codec engine and video image processing algorithm, this SoC provides analog HD DVR solutions for multiple peripheral devices and high-speed interfaces for wide adoption in analog HD surveillance markets.

Arm Cortex-A53 quad-core processor@1.15 GHz

16-channel 1080p15 H.265/H.264 encoding and eight 4K video inputs

NNIE with 1.2 TOPS of computing power

Key Features

  • Processor Cores

    • Arm Cortex-A53 quad-core@1.15 GHz
    − 32 KB L1 I-cache and 32 KB L1 D-cache
    − 512 KB L2 cache
    − Neon and FPU
  • Multi Protocol Video Codec

    • H.265 Main Profile, Level 5.0 encoding
    • H.265 Main Profile, Level 5.1 decoding
    • H.264 Baseline/Main/High Profile, Level 5.1 encoding
    • H.264 Baseline/Main/High Profile, Level 5.2 decoding
    • MJPEG/JPEG Baseline encoding and decoding
  • Video Codec

    • H.265/H.264/JPEG multi-stream encoding and decoding performance:
    − 8x 1080p@30 fps H.265/H.264 encoding + 8x D1@30 fps H.265/H.264 encoding + 8x 1080p@30 fps H.265/H.264 decoding + 8x 1080p@2 fps JPEG encoding
    − 16x 1080p@15 fps H.265/H.264 encoding + 16x D1@30 fps H.265/H.264 encoding + 16x 1080p@15 fps H.265/H.264 decoding + 16x 1080p@2 fps JPEG encoding
    − 16x 4M@7.5 fps H.265/H.264 encoding + 16x D1@30 fps H.265/H.264 encoding + 16x 4M@7.5 fps H.265/H.264 decoding + 16x 4M@1 fps JPEG encoding
    • Seven bit rate control modes (CBR, VBR, AVBR, CVBR, FIXQP, QPMAP, and QVBR)
    • Up to 20 Mbit/s output bit rate
    • ROI encoding
    • Color-to-grayscale encoding
  • SVP

    • NNIE
    − Multiple neural network options
    − 1.2 TOPS computing performance
    − Comprehensive APIs and toolchains
    − Diverse applications such as face detection, facial recognition, object detection, and object tracking
    • IVE
    − Object tracking
    • MAU
    − Single-precision or half-precision floats
    − Feature vector comparison
  • Video and Graphics Processing

    • Pre-processing and post-processing including deinterlacing, sharpening, 3DNR, DCI, and mosaic
    • Anti-flicker for video and graphic outputs
    • Video scaling (1/15x to 16x)
    • Graphics scaling (1/2x to 2x)
    • Up to four Cover regions
    • Up to 8-region OSD overlay
  • Video Interfaces

    • VI interfaces
    − Eight MIPI D-PHY interfaces and one BT.1120 video cascade interface
    − Each MIPI interface supports:
    • Four lanes at rates up to 1.5 Gbit/s
    • Single input, two multiplexed inputs, or four multiplexed inputs
    • Multiplexed as one 8-bit BT.656 interface
    − Every two BT.656 interfaces can form one 16-bit BT.1120 interface.
    − Both BT.656 and BT.1120 interfaces support dual-edge sampling at 148.5 MHz.
    − Up to 33 VI channels (including one video cascade channel)
    − 16-channel online video scaling
    − The source image and the scaled image can be output at the same time.
    − Maximum MIPI input performance:
    • 8-channel 4K@30 fps or 16-channel 4K@15 fps
    • 16-channel 4M@30 fps or 16-channel 5M@20 fps
    • 32-channel 1080p@30 fps
    − Maximum output performance: 16-channel 1080p@30 fps (or 4M/5M/4K images with the same data volume) + 1-channel 4K@30 fps (cascade input image)
    • VO interfaces
    − One HDMI 2.0 output interface with the maximum output of 3840 x 2160@60 fps
    − One VGA HD output interface at up to 2560 x 1600@60 fps
    − One BT.1120 HD output interface at up to 3840 x 2160@30 fps (dual-edge sampling)
    − One CVBS SD output interface, supporting the PAL/NTSC standard output
    − Two independent HD VO channels (DHD 0 and DHD 1)
    • Two HD interfaces with display from different sources
    • DHD 0 supports 64-picture display.
    • DHD 1 supports 64-picture display.
    − One independent SD output channel (DSD 0)
    − One PiP layer, which can be overlaid with DHD 0 or DHD 1
    − Two graphics layers in ARGB1555, ARGB4444, or ARGB8888 format for DHD 0 and DHD 1, respectively
    − One special graphics layer, which supports CLUT 2/CLUT 4 and can be bound to DHD 0, DHD 1, or DSD 0
    − One hardware cursor layer in ARGB1555, ARGB4444, or ARGB8888 format (configurable) with a maximum resolution of 256 x 256
  • Audio Interfaces

    • Three unidirectional I2S/PCM interfaces
    − Two inputs, 20-channel multiplexed
    − One dual-channel output
  • ETH Interfaces

    • Two GE interfaces
    − RGMII and RMII modes
    − 10/100 Mbit/s half-duplex or full-duplex
    − 1000 Mbit/s full-duplex
    − TSO for reducing the CPU overhead
  • Security Engine

    • AES 128/192/256-bit encryption and decryption algorithms
    • RSA 2048/4096-bit encryption and decryption algorithms
    • SHA256/HMAC_SHA1/HMAC_SHA224/HMAC _SHA256
    • OTP, providing 28-kbit user space to burn images
    • Hardware-based true random number generator
    • Secure boot
    • Secure memory isolation
  • Peripheral Interfaces

    • Four SATA 3.0/PCIe 2.0 combo interfaces
    − The interface combination modes can be as follows: 4*SATA, 2*SATA+1*PCIe x2, 2*SATA+2*PCIe x1, or 2*PCIe x2.
    − When the combo interface is configured as PCIe 2.0, the RC and EP functions are supported.
    − When the combo interface is configured as SATA 3.0, the eSATA and PM functions are supported.
    • 1x USB 3.0 host interface
    • 2x USB 2.0 host interface
    • 5x UART interfaces, two of which support the 4-wire mode
    • 1x SPI interface, supporting four chip selects (CSs)
    • 1x IR interface
    • 2x I2C interfaces
    • Multiple GPIO interfaces
  • Memory Interfaces

    • Two 32-bit DDR4/DDR3 interfaces
    − Dual channels
    − Maximum DDR4 clock frequency: 1200 MHz
    − Maximum DDR3 clock frequency: 1066 MHz
    − Maximum capacity: 8 GB
    • SD/MMC interfaces
    − eMMC 4.5/eMMC 5.0/eMMC 5.1
    − HS400 (150 MHz dual-edge)
    − SDIO 3.0 (non-SD card)
    • SPI NOR/NAND flash interfaces
    − Two CSs, which can be connected to different types of flash memories
    − For the SPI NOR flash:
    • 1-, 2-, or 4-wire mode
    • 3- or 4-byte address mode
    • Maximum capacity: 256 MB
    − For the SPI NAND flash:
    • SLC flash
    • 2 KB or 4 KB page size
    • 8- or 24-bit ECC (in the unit of 1 KB)
    • Maximum capacity: 2 GB
  • RTC with Independent Power Supply

    Independent battery for supplying power to the RTC
  • Multiple Boot Modes

    • Booting from the BootROM
    • Booting from the SPI NOR flash
    • Booting from the SPI NAND flash
    • Booting from the eMMC
    • Booting from the slave chip over the PCIe interface
  • SDK

    • Linux SMP (64-bit)
    • Audio codec libraries that support multiple protocols
    • High-performance PC decoding library based on H.265/H.264
  • Chip Physical Specifications

    • Power consumption
    − Power consumption in typical scenarios (16-channel 1080p@15 fps encoding + 16-channel 1080p@15 fps decoding + deep learning intelligent algorithm): 4.6 W
    − Multi-level power consumption control
    • Operating voltages
    − Core voltage: 0.9 V
    − CPU voltage: 1.0 V
    − I/O voltage: 1.8 V/3.3 V
    − Voltage of the DDR4 interface: 1.2 V
    − Voltage of the DDR3 interface: 1.5 V
    • Package
    − RoHS, EHS-TFBGA
    − Ball pitch: 0.8 mm
    − Dimensions: 22.4 mm x 31.2 mm
    − Operating temperature: 0°C–70°C

View More Products

Support

HV2 Product Support Intro
Technical Support
banner